The NXP i.MX6UL CPU has five GPIO ports. Each port can generate and control 32 signals.

The MCA also features a number of GPIO pins (multiplexed with Analog-to-Digital Converter (ADC) functionality). See MCA I/O pads for a list of all available MCA IOs and their capabilities.

GPIOs on the ConnectCore 6UL platforms

  • On the ConnectCore 6UL system-on-module:

    • Many of the i.MX6UL GPIOs are available at the system-on-module, multiplexed with other functions (labeled GPIOxIOy where _x is the port and y is the GPIO pin). See Hardware reference manuals for information about GPIO pins and their multiplexed functionality.

    • Eight MCA GPIO pins are available (labeled MCA_IOx where x is the GPIO pin).

  • On the ConnectCore 6UL SBC Express, the expansion connector allows direct access to several i.MX6UL GPIOs and MCA GPIOs.

  • On the ConnectCore 6UL SBC Pro board, an I/O Expander chip features up to 39 GPIO pins (multiplexed with Analog-to-Digital Converter (ADC) functionality). See I/O Expander GPIO for additional information on I/O Expander GPIOs. The GPIO connector allows direct access to several i.MX6UL GPIOs, MCA GPIOs, and I/O Expander GPIOs.

GPIOs on the SOM and carrier board are used for many purposes, such as:

  • Power enable line for transceivers

  • Reset line for controllers

  • LCD backlight control

  • Interrupt line

  • User LED

  • User button

Kernel configuration

You can manage the user space interface with GPIOs through the kernel configuration option:

  • /sys/class/gpio/…​ (sysfs interface) (CONFIG_GPIO_SYSFS)

This option is enabled as built-in on the default ConnectCore 6UL kernel configuration file.

Support for i.MX6UL GPIOs is automatically provided through the non-visible option CONFIG_GPIO_MXC.

Kernel driver

The driver for the i.MX6UL GPIO is located at:

File Description

drivers/gpio/gpio-mxc.c

i.MX6UL GPIO driver

Device tree bindings and customization

The i.MX6UL GPIO device tree binding is documented at Documentation/devicetree/bindings/gpio/fsl-imx-gpio.txt.

One GPIO controller is defined for each i.MX6UL GPIO port in the common i.MX6UL device tree file:

i.MX6UL device tree
gpio1: gpio@0209c000 {
	compatible = "fsl,imx6ul-gpio", "fsl,imx35-gpio";
	reg = <0x0209c000 0x4000>;
	interrupts = <GIC_SPI 66 IRQ_TYPE_LEVEL_HIGH>,
			<GIC_SPI 67 IRQ_TYPE_LEVEL_HIGH>;
	gpio-controller;
	#gpio-cells = <2>;
	interrupt-controller;
	#interrupt-cells = <2>;
	gpio-ranges = <&iomuxc  0 23 10>, <&iomuxc 10 17 6>,
			<&iomuxc 16 33 16>;
};

[...]

gpio5: gpio@020ac000 {
	compatible = "fsl,imx6ul-gpio", "fsl,imx35-gpio";
	reg = <0x020ac000 0x4000>;
	interrupts = <GIC_SPI 74 IRQ_TYPE_LEVEL_HIGH>,
			<GIC_SPI 75 IRQ_TYPE_LEVEL_HIGH>;
	gpio-controller;
	#gpio-cells = <2>;
	interrupt-controller;
	#interrupt-cells = <2>;
	gpio-ranges = <&iomuxc 0 7 10>, <&iomuxc 10 5 2>;
};

The ConnectCore 6UL device tree include file and the carrier board device tree files use the i.MX6UL GPIOs.

For example, on the ConnectCore 6UL, GPIO5_IO04 is used as interrupt line from the MCA, and GPIO4_IO14 is used to activate internal circuitry during the MCA firmware update:

ConnectCore 6UL device tree
mca_cc6ul: mca@7e {
	compatible = "digi,mca-cc6ul";
	reg = <0x7e>;
	interrupt-parent = <&gpio5>;
	interrupts = <4 IRQ_TYPE_EDGE_FALLING>;
	interrupt-controller;
	#interrupt-cells = <2>;
	fw-update-gpio = <&gpio4 14 GPIO_ACTIVE_LOW>;
	pinctrl-names = "default";
	pinctrl-0 = <&pinctrl_mca_cc6ul>;

[...]
};

For example, on the ConnectCore 6UL SBC Pro, GPIO5_IO06 is used to reset the PHY of ENET2 Ethernet interface:

ConnectCore 6UL SBC Pro device tree
&fec2 {
	pinctrl-names = "default";
	pinctrl-0 = <&pinctrl_enet2>,
		    <&pinctrl_enet2_mdio>,
		    <&pinctrl_enet2_gpio>;
	phy-mode = "rmii";
	phy-handle = <&ethphy1>;
	phy-reset-gpios = <&gpio5 6 GPIO_ACTIVE_LOW>;
	phy-reset-duration = <26>;
	digi,phy-reset-in-suspend;

	[...]
};

IOMUX configuration

You must configure the pads that are to be used as i.MX6UL GPIOs. See Pin multiplexing (IOMUX).

For GPIOs that are managed by other drivers, you must configure their pad IOMUX inside the driver node specific pinctrl-0 to work according to the specified interface functionalities.

On the ConnectCore 6UL example from above, mca_cc6ul node configures pinctrl_mca_cc6ul:

ConnectCore 6UL device tree
pinctrl_mca_cc6ul: mcagrp {
	fsl,pins = <
		/* MCA_nINT */
		MX6UL_PAD_SNVS_TAMPER4__GPIO5_IO04	0xb0b1
		/* MCA_FW_UPDATE */
		MX6UL_PAD_NAND_CE1_B__GPIO4_IO14	0x30
	>;
};

For GPIOs that are not associated with any interface or that can’t be handled by a driver, see Configure independent pin IOMUX and pad control. The following external pads are configured as GPIOs on the default device tree:

  • On the ConnectCore 6UL SBC Express expansion connector:

    Pad Signal GPIO

    11

    GPIO3_4

    GPIO3_IO04

    12

    JTAG_TDI/GPIO1_13

    GPIO1_IO13

    13

    GPIO3_10_PROT

    GPIO3_IO10

    15

    JTAG_MOD/GPIO1_10

    GPIO1_IO10

    16

    JTAG_TMS/GPIO1_11

    GPIO1_IO11

    18

    GPIO3_12_PROT

    GPIO3_IO12

    27

    PWM2/I2C3_SCL_PROT

    GPIO3_IO06

    29

    GPIO5

    GPIO1_IO05

    32

    PWM4_PROT

    GPIO3_IO08

    33

    GPIO3_7/PWM3_PROT

    GPIO3_IO07

    35

    JTAG_TDO/GPIO1_12

    GPIO1_IO12

    36

    CSI_MCLK

    GPIO4_IO17

    37

    CSI_PIXCLK

    GPIO4_IO18

    38

    JTAG_nTRST/GPIO1_15

    GPIO1_IO15

    40

    JTAG_TCK/GPIO1_14

    GPIO1_IO14

  • On the ConnectCore 6UL SBC Pro GPIO connector:

    Pad Signal GPIO

    12

    EXP_GPIO_2

    GPIO1_IO03

SION bit

It is not possible to read the real signal level of a GPIO pin that is configured as an output. You can use the software input on (SION) bit to read the value of an output GPIO.

SION bit mode increases the power consumption of the module, so it is disabled by default.

To enable the SION bit, set the bit 30 (special value). In other words, do an OR mask of your previous value with 0x40000000:

ConnectCore 6UL SBC Express device tree
&iomuxc {
	pinctrl-names = "default";
	pinctrl-0 = <&pinctrl_hog>;

	pinctrl_hog: hoggrp {
		fsl,pins = <
			/* GPIO3_IO04 on Expansion connector (SION enabled)*/
			MX6UL_PAD_LCD_RESET__GPIO3_IO04         0x4000f030
		>;
	};

	[...]
};

For more information, see the NXP Application Note AN5078.

Using the GPIOs

You can access the GPIOs from the sysfs. See the Linux kernel documentation at Documentation/gpio/sysfs.txt.

Calculate the Linux GPIO number of a GPIO pin

For each GPIO controller entry on the device tree, Linux creates an entry /sys/class/gpio/gpiochipN, where N is an integer number starting at 0, with the following read-only attributes:

  • base: same as N, the first GPIO managed by this chip

  • label: provided for diagnostics (not always unique)

  • ngpio: the number of GPIOs this controller manages (from N to N + ngpio - 1)

GPIOs on the ConnectCore 6UL system-on-module

Every GPIO port of the i.MX6UL CPU is a different GPIO controller and thus has its own /sys/class/gpio/gpiochipN entry on the sysfs.

On the default ConnectCore 6UL system-on-module device tree, the i.MX6UL CPU’s GPIO ports are probed first:

  • PORT1: /sys/class/gpio/gpiochip0

  • PORT2: /sys/class/gpio/gpiochip32

  • PORT3: /sys/class/gpio/gpiochip64

  • PORT4: /sys/class/gpio/gpiochip96

  • PORT5: /sys/class/gpio/gpiochip128

Calculate the Linux GPIO number for a certain GPIO pin by adding the GPIO pin index to the port base index. For instance:

i.MX6UL GPIO2_IO4 (port 2, pin 4) is: 32 + 4 = 36

Since the i.MX6UL CPU has five ports, all of which have 32 pins, the following formula also applies to i.MX6UL CPU GPIOs (without requiring the user to know the GPIO base of each port):

\$"LinuxGPIO_num" = ("<imx6ul_gpio_port>" - 1) * 32 + "<imx6ul_gpio_pin>"\$

For example, i.MX6UL GPIO2_IO4 (port 2, pin 4) translates to:

\$(color(red)(2) - 1) * 32 + color(red)(4) = 36\$

Example: write from sysfs

The ConnectCore 6UL SBC Express has GPIO3_IO04 on the expansion connector. To drive this as an ouput:

  1. Calculate the Linux GPIO number:

    \$"GPIO3_IO04" -> (color(red)(3) - 1) * 32 + color(red)(4) = 68\$

  2. Request the GPIO:

    ~# echo 68 > /sys/class/gpio/export
  3. Configure the GPIO as output:

    ~# echo out > /sys/class/gpio/gpio68/direction
  4. Drive the GPIO high:

    ~# echo 1 > /sys/class/gpio/gpio68/value
  5. Drive the GPIO low:

    ~# echo 0 > /sys/class/gpio/gpio68/value
  6. When you are done using the GPIO, free it with:

    ~# echo 68 > /sys/class/gpio/unexport

Sample application

An example application called apix-gpio-example is included in the dey-examples-digiapix recipe (part of dey-examples package) of meta-digi layer. This application shows how to manage GPIO lines using the Digi APIx library on the ConnectCore 6UL platform.

Go to GitHub to see the application instructions and source code.

See GPIO API for more information about the GPIO APIx.

See MCA General Purpose Input/Output (GPIO) for additional information on MCA GPIOs.

See I/O Expander for additional information on I/O Expander GPIOs.